555 Timer IC

555 Timer IC


The 555 Timer IC is an integrated circuit (chip) implementing a variety of timer and multivibrator applications. The IC was designed and invented by Hans R. Camenzind. It was designed in 1970 and introduced in 1971 by Signetics (later acquired by Philips). The original name was the SE555/NE555 and was called "The IC Time Machine". The 555 gets its name from the three 5-kohm resistors used in typical early implementations. It is still in wide use, thanks to its ease of use, low price and good stability. As of 2003, 1 billion units are manufactured every year.[citation needed]

Depending on the manufacturer, it includes over 20 transistors, 2 diodes and 15 resistors on a silicon chip installed in an 8-pin mini dual-in-line package (DIP-8).

The 556 is a 14-pin DIP that combines two 555s on a single chip.

The 558 is a 16-pin DIP that combines four slightly modified 555s on a single chip (DIS & THR are connected internally, TR is falling edge sensitive instead of level sensitive).

Also available are ultra-low power versions of the 555 such as the 7555 and TLC555. The 7555 requires slightly different wiring using fewer external components and less power.

The 555 has three operating modes:


Animated waveform. 555 produces a square wave output

  • Monostable mode: in this mode, the 555 functions as a "one-shot". Applications include timers, missing pulse detection, bouncefree switches, touch switches, frequency divider, capacitance mea

surement, pulse-width modulation (PWM) etc

  • Astable - free running mode: the 555 can operate as an oscillator. Uses include LED and lamp flashers, pulse generation, logic clocks, tone generation, security alarms, pulse position modulation, etc.
  • Bistable mode or Schmitt trigger: the 555 can operate as a flip-flop, if the DIS pin is not connected and no capacitor is used. Uses include bouncefree latched switches, etc.


Below is a illustration of a 8-pin 555-timer.

100px-555 Pinout

555 pinout

The connection of the pins is as follows:

Nr. Name Purpose
1 GND Ground, low level (0V)

A high-to-low transition (below 1/3 VCC) on the trigger forces output to +VCC then a low to high tranistion (above 1/3 VCC) starts the timing interval

3 OUT During a timing interval, the output stays at +VCC
4 Reset A timing interval can be interrupted by applying a reset pulse to low (0V)
5 CTRL Control voltage allows access to the internal voltage divider (2/3 VCC)
6 THR The threshold at which the interval ends (it ends if U.thr → 2/3 VCC)
7 DIS Connected to a capacitor whose discharge time will influence the timing interval
8 V+, VCC The positive supply voltage which must be between 3 and 15 V

A sample 555-timer circuit.

100px-555 Monostable

555 Schematic


LF/LM555 Data Sheet by Fairchild Semiconductor, 2002.



555 Timer Explanation - Monostable and Astable